FIG. 8 illustrates a digital to analog conversion system for converting a b-bit digital input signal x[n] into an analog output signal y(t). In said respect, the b-bit digital input signal is applied to a bit encoder (here a thermometer encoder), which translates the digital input signal x[n] to a further code t[n] (here a thermometer code as used in the system of WO 01/91300). The output of the bit encoder t0[n], t1[n] . . . , t2b−2[n] (total number of 2b−1) is input to a plurality (2b−1) of 1-bit DAC elements to generate respective analog outputs y0(t), y1(t) . . . , y2b−2(t). These analog outputs of the plurality of 1-bit DAC elements are fed to an analog output summing node, that sums the respective analog outputs to generate the analog output signal y(t).
In the process of digital to analog conversion, the thermometer code output t[n], corresponding to the digital value of the input signal x[n], activates the unit value of the analog entities (which may be current or voltage sources). The analog output is the summation of all those activated analog entities.
Systems for digital to analog conversion use matched references, amplifiers and switches to perform the signal conversion. Typically, voltages or currents (see above) are generated by matched components, such as resistors, transistors and/or capacitors. However, perfectly matched components (i.e. having identical electrical properties) are practically impossible to fabricate. Because of variations in circuit fabrication processes, temperature gradients across the circuit, component aging and component noise, circuit component values differ from their design values. These variations, called mismatch errors, cause inaccurate output levels which leads to harmonic distortion that reduces the spurious-free dynamic range (SFDR) at the analog output.
For instance, with regard to the current steering thermometer DAC, since the geometry of the transistors, from which the current sources may be constructed, deviates from one another, the current will also deviate. Hence, the difference between each output level of the DAC varies, which introduces spurious tones in the output.
The SFDR relates to the nonideal output of a converter. When an ideal converter's input is a sinusoid, the output spectrum contains energy at the input's fundamental frequency and possibly at DC. When a nonideal converter's input is a sinusoid, spectral energy is located at frequencies other than that found in the output of an ideal converter. SFDR is the difference in amplitude between the largest of these spectral components, called spurs, and the amplitude of the one at the input's fundamental frequency.
Trimming and calibration have been used to decrease element mismatches and may result in high SFDR and small maximum output errors.
To decrease element mismatches, Static Element Matching (SEM) techniques may be used, such as special placement/layout techniques, laser trimming etc. For instance, the components may be placed close together in certain patterns and made sufficiently large to yield small relative errors. This reduces the variation between the components. However, SEM techniques will not compensate the errors occurring after the fabrication, e.g. aging, temperature variation.
Dynamic Element Matching (DEM) continuously compensates the analog mismatch errors by manipulating the digital circuitry as will be explained in the following. DEM for example can be used in digital-to-analog converters (DACs) to improve their spectral properties and achieve a high SFDR.
DEM randomizes the analog mismatch error at the output by switching ON and OFF the analog entity depending on the digital input in a sequence by which harmonic coherence is reduced and made into signal independent noise, in which case, the SFDR of the analog output is improved. Put differently, Digital DEM algorithms rearrange mismatched elements by reordering the bits of the digital inputs to the mismatched elements. Digital DEM algorithms use signal processing algorithms and interconnection networks to virtually permute the mismatched components.
In the following, the principle of DEM is exemplified using the system of FIG. 9, which, compared to the system of FIG. 8, additionally comprises a 2b−1 line interconnection network, between the thermometer encoder and the 1-bit DACs. The system performs DEM by mapping a b bit input signal x[n] to the 2b−1 single bit DACs through the 2b−1 line interconnection network. Using the interconnection network to randomize the mapping between the thermometer coded signal t[n] and the array of 1-bit DACs, the positions of mismatched unit DACs can be virtually altered.
With a deterministic DEM interconnection network, the shuffled thermometer coded signal, g[n], activates the single bit DACs chosen according to a deterministic algorithm. As a result of this random rearrangement of the 1-bit DACs, the mismatched components, which generally generate the harmonics, that now becomes white in nature and distributed in the whole frequency range.
With a stochastic DEM interconnection network, the shuffled thermometer coded signal, g[n], activates the single bit DACs chosen at random. In other words, by using DEM it is possible to select the 1-bit DACs in a random sequence with every operation of the DAC. As a result of this virtual random rearrangement of the 1-bit DACs, the mismatched components generate (white) noise instead of harmonic distortion, because the spreads are averaged across the entire spectrum. The spurious tones are thus removed; however, the noise floor is raised, which may result in a worsening of the signal-to-noise ratio. This may be compensated by applying oversampling.
Regardless of the particular DEM algorithm employed, the mismatched errors can be reduced and the SFDR of the analog output can be increased.
DEM algorithms can be used to reduce the mismatch error of many different elements, including capacitors, transistors and even complex structures, including current sources. DEM algorithms can be applied in all kinds of technical circuits in which a plurality of b-bit binary input codes are converted into a plurality of (2b−1)-bit digital output codes.
A glitch is usually a short-lived fault in a system before the signal settles to its intended value. For instance, such a false output of short duration appears in logic circuits, when for a short time outputting a wrong result of a logical Boolean operation. A wrong output may be generated for short periods of time, especially for transitions between digital codes that have a large number of different bit values, such as 011 . . . 11 and 100 . . . 00. For a short moment, the maximal output code 111 . . . 11 may appear, resulting in a large current spike on the output. Glitches are a severe problem since they put an upper limit on the speed-performance of digital-to-analog conversion systems.
When using a thermometer code for input to the 1-bit DACs (e.g. current sources), the switches of the 1-bit DACS will not be switched on and off at the same time, thus reducing glitches.
However, this good property of the thermometer code is usually spoiled when DEM is applied at the same time.
For instance, the prior art system presented in the International patent publication WO 01/91300 uses a thermometer code and a scrambler in order to implement DEM in a digital-to-analog converter. It is suggested therein to scramble N-bit thermometer data words into N-bit output data words using a randomizer switch network as illustrated in FIG. 10. The prior art uses numerous switches which are controlled by a random input signal p.
Because of the randomizer switch network of FIG. 10, the solution of WO 01/91300 uses a large area. A further drawback is that the design of the network is not scalable and thus, when increasing the bits of the input, the necessary area increases exponentially. In addition, there are large critical paths which may cause problems in high speed design.
Given the above problems with the prior art systems, it would be advantageous to provide a system which reduces glitches like the thermometer code, allows to use DEM to reduce mismatches in the components and further does not have the disadvantages of the prior art.